Ovivo

Dr. Rushikesh (Rushi) Matkar is the Pathfinding Technologist for Water purification at Intel’s R&D Center in Hillsboro, OR and a corporate owner for the leadership roadmap of Intel's water management group. Responsible for driving solutions towards the success of Intel's high volume manufacturing roadmap. He is passionate about high purity delivery of utilities, IOT and advanced manufacturing. Between Academia and Industry, Rushi has extensive experience in bringing new IP to Market. Recently, Rushi successfully led the program to introduce EUV Lithography as a patterning solution for fabrication at Globalfoundries. He has served multiple roles within the leading nodes in technology management, operations and engineering management to help multiple technology nodes meet mass-market benefits.

Dr. Altun is the co-founder and CEO of UNISERS AG, an ETH Zurich spinoff from Switzerland. UNISERS has been developing a wafer defect inspection and review tool with a sub-10nm detection limit. Dr. Altun has 15-year experience in nanotechnology and optical sensing. Prior to his position at UNISERS AG, he did a Ph.D. at ETH Zurich. He worked at Lawrence Livermore National Laboratories (2011-2014) and Korean Institute of Machinery and Materials (2005-2010). He had his B.Sc. degree from METU (Middle East Tech. Univ.), Turkey and M.Sc. degree at KAIST (Korea Advanced Institute of Science and Technology).

UNISERS

Dan’s almost three decades of experience as a facilities engineering manager, process engineer, design engineer, construction project manager and tool hookup design in the advanced technologies and semiconductor manufacturing industry has led to innovative solutions in his work. His innovations have resulted in industry-changing quality and cost savings breakthroughs, including defect reduction and innovative water reclaim and re-use systems. Dan is well established in the semiconductor industry as an Ultra-pure Water, UHP Chemical and Wastewater expert as shown in his leadership of industry roadmap and collaboration teams. He is certified by ASQ as a six sigma black belt. His roles include Co-Chair of International Roadmap for Device and Systems (IRDS) Yield Enhancement (YE) team, Co-Chair UPW SEMI Standards team, and UP Micro Conference Strategy Team. In addition to many industry publications, Dan also holds a patent for Reduction of Charging Induced Damage in Photolithography Wet Process.

Samsung Austin Semiconductor

Latif joined Intel in 2005 as Microcontamination Engineer for the startup of 45nm process at Fab-32 in Arizona. He has been involved in four more process transfers to Arizona, including the latest 10nm startup. He is technical expert in Microcontamination, including AMC’s, with over 25 years of experience in environmental, semiconductor testing, AMC’s and other Microcontamination problem solving. Prior to joining Intel, Latif worked as a Research Scientist at Balazs Analytical and as a Technical Support Manager at ChemTrace. Latif has participated in collaborative efforts with many chemical and equipment manufacturing companies and organizations including, Sematech, Factory Mutual Research Corporation, in development of criteria for approval of materials suitable for use in semiconductor fabs.

Intel

Dr. Sriram (Ram) Ramamoorthy is a Supply Chain R&D Engineer/Technologist in Intel’s Fab Materials Organization managing specialty chemicals and filtration. Prior to this role, Ram was a senior process technology development engineer in Intel R&D fab in Oregon developing front end wet etch processes. Ram is an active member in IRDS and SEMI task forces and standards team. Ram received his Ph.D in Chemical Engineering from Rensselaer Polytechnic Institute (Troy, NY).

Tina is a civil engineer working for Kokosing, a self-performing heavy industrial contractor in the Midwest and Mid-Atlantic. She holds a BS in CE from Case Western Reserve University and a MS in CE from Cleveland State University. Tina is a licensed PE in IL, IN, MI, PA, OH.

Kokosing Industrial

Bernie Zerfas is a former facilities engineer at GLOBALFOUNDRIES. He has more than 30 years’ experience in the semiconductor industry with a primary focus on UPW and deionized water systems. Although his initial formal training was in chemistry and chemical engineering, he has had a wide variety of formal and informal educational experiences in a variety of technical disciplines. Mr. Zerfas is also an active member of the UPW sub-group of the ITRS; a recent area of focus has been organic and particulate contamination. His current other areas of responsibility include a spectrum of pollution control systems.

I am a professional chemical engineer located in Kansas City. I focused on water and wastewater treatment design for the first 15 years of my career before transitioning into engineering and project management where I have mainly managed large water and wastewater projects for 10 years.

Kiewit

Senior Process Chemical Engineer with 30+ years of experience working in Facilities Operation Engineering and Design within the semiconductor manufacturing industry. He is a Subject Matter Expert in chemicals, chemical systems, and application for semiconductor manufacturing, pollution abatement, water and wastewater treatment and supporting HazWaste systems and operation.

Micron

After more than 20 years as water treatment engineer at Rousset plant (France), in charge of subcontractor team (2 engineers, 2 technicians), operating UPW plant and waste water plant, I'm water program manager, technical leader for Ultra Pure Water Water treatment for STMicroelectronics Front-End plants (France, Italy, Singapore) - Technical support (project and troubleshooting) - Quality and monitoring standardization - Water saving focus - Invest technical approval - UPW engineers team coordination Ultra pure water specialist.

STMicroelectronics

Gary Van Schooneveld is President of CT Associates, Inc. Gary has over 30 years of experience with high-purity fluid systems including chemical delivery and ultrapure water and the development and testing of their associated materials and components. He is the author or co-author of more than 45 technical papers and presentations. Gary is co-chair of the SEMI UPW Task Force and an active member of the IRDS UPW and IRDS Critical Components Task Forces. Gary as been a key contributor in the development and validation of SEMI specification for measuring filter retention below 15 nm (SEMI C79), particle shedding from critical components (SEMI F104) and extractables ion exchange resin rinse performance (SEMI C93). Gary has BS and MS degrees in Materials Engineering from Rensselaer Polytechnic Institute (Troy, NY) and an MBA from the University of Texas (Arlington, TX).

CT Associates

Kevin Wolfe is an environmental engineer working within the Global Environmental department at Intel Corporation. He has been working at Intel for 21 years in many environmental health and safety capacities, and currently leads the PFAS working group internal to Intel, and helps to project manage the SIA Semiconductor PFAS Consortium that intends to work towards developing the technical information that will be required to effectively engage with PFAS regulatory restriction efforts.

Gregory Schmitt

More UltraFacility members

Rushi Matkar

Ali Altun

Dan Wilcox

Latif Ahmed