UNISERS

Senior Process Chemical Engineer with 30+ years of experience working in Facilities Operation Engineering and Design within the semiconductor manufacturing industry. He is a Subject Matter Expert in chemicals, chemical systems, and application for semiconductor manufacturing, pollution abatement, water and wastewater treatment and supporting HazWaste systems and operation.

Micron

Dominic is the Intel Director of Construction responsible for managing Intel’s latest leading edge Wafer FAB construction Program at Intel’s Ocotillo Campus Phoenix AZ. This program is part of Intel’s $20b investment on the campus.


Dominic has 35 years’ experience in EPCC project delivery. 16 years working with EPCC firms Costain, Jacobs, Fluor, DPS and 20 years within Intel.


Dominic holds a BSc in Construction Technology and an MSc in Project management.




Intel

Dr. Altun is the co-founder and CEO of UNISERS AG, an ETH Zurich spinoff from Switzerland. UNISERS has been developing a wafer defect inspection and review tool with a sub-10nm detection limit. Dr. Altun has 15-year experience in nanotechnology and optical sensing. Prior to his position at UNISERS AG, he did a Ph.D. at ETH Zurich. He worked at Lawrence Livermore National Laboratories (2011-2014) and Korean Institute of Machinery and Materials (2005-2010). He had his B.Sc. degree from METU (Middle East Tech. Univ.), Turkey and M.Sc. degree at KAIST (Korea Advanced Institute of Science and Technology).

Dr. Sriram (Ram) Ramamoorthy is a Supply Chain R&D Engineer/Technologist in Intel’s Fab Materials Organization managing specialty chemicals and filtration. Prior to this role, Ram was a senior process technology development engineer in Intel R&D fab in Oregon developing front end wet etch processes. Ram is an active member in IRDS and SEMI task forces and standards team. Ram received his Ph.D in Chemical Engineering from Rensselaer Polytechnic Institute (Troy, NY).

Brad Herbert is a Sr. Process Engineer with Jacobs. Brad’s areas of focus include water management, water reclaim, ultrapure water, wastewater, chemicals, mentoring, and staff development. Over the past 30 years, Brad has worked as a global facilities engineer, site facilities engineer, facilities manager, design consultant, project manager, and product engineer in the semiconductor and water treatment industries. He has led engineering efforts, managed projects, and supported operations throughout The Americas, Europe, and Asia. His work history includes onsemi, LSI Logic, AMD, IDC (CH2M), DeNora Water Technologies, Monsanto, and Sigma-Aldrich. Brad is a licensed Professional Engineer and has a B.S. Degree in Chemical Engineering from the University of Missouri.

Jacobs Engineering Solutions

After more than 20 years as water treatment engineer at Rousset plant (France), in charge of subcontractor team (2 engineers, 2 technicians), operating UPW plant and waste water plant, I'm water program manager, technical leader for Ultra Pure Water Water treatment for STMicroelectronics Front-End plants (France, Italy, Singapore) - Technical support (project and troubleshooting) - Quality and monitoring standardization - Water saving focus - Invest technical approval - UPW engineers team coordination Ultra pure water specialist.

STMicroelectronics

Dave Buesser is the COO of FTD Solutions. He is a mechanical engineer from the University of Arizona, and he has spent his entire 27-year career driving advanced technology facilities forward. He began with a focus on semiconductor process piping design and proceeded to build likely the deepest experience in the industry on UPW distribution systems. He has led the design efforts for several UPW plants for greenfield semiconductor facilities and has also led many multi-discipline design teams on microelectronics facilities. Today, his focus is to bring world-class expertise coupled with unique tools to help solve the most pressing UPW and facilities challenges facing advanced industries.

FTD Solutions

Bernie Zerfas is a former facilities engineer at GLOBALFOUNDRIES. He has more than 30 years’ experience in the semiconductor industry with a primary focus on UPW and deionized water systems. Although his initial formal training was in chemistry and chemical engineering, he has had a wide variety of formal and informal educational experiences in a variety of technical disciplines. Mr. Zerfas is also an active member of the UPW sub-group of the ITRS; a recent area of focus has been organic and particulate contamination. His current other areas of responsibility include a spectrum of pollution control systems.

Gary Van Schooneveld is President of CT Associates, Inc. Gary has over 30 years of experience with high-purity fluid systems including chemical delivery and ultrapure water and the development and testing of their associated materials and components. He is the author or co-author of more than 45 technical papers and presentations. Gary is co-chair of the SEMI UPW Task Force and an active member of the IRDS UPW and IRDS Critical Components Task Forces. Gary as been a key contributor in the development and validation of SEMI specification for measuring filter retention below 15 nm (SEMI C79), particle shedding from critical components (SEMI F104) and extractables ion exchange resin rinse performance (SEMI C93). Gary has BS and MS degrees in Materials Engineering from Rensselaer Polytechnic Institute (Troy, NY) and an MBA from the University of Texas (Arlington, TX).

CT Associates

Dan’s almost three decades of experience as a facilities engineering manager, process engineer, design engineer, construction project manager and tool hookup design in the advanced technologies and semiconductor manufacturing industry has led to innovative solutions in his work. His innovations have resulted in industry-changing quality and cost savings breakthroughs, including defect reduction and innovative water reclaim and re-use systems. Dan is well established in the semiconductor industry as an Ultra-pure Water, UHP Chemical and Wastewater expert as shown in his leadership of industry roadmap and collaboration teams. He is certified by ASQ as a six sigma black belt. His roles include Co-Chair of International Roadmap for Device and Systems (IRDS) Yield Enhancement (YE) team, Co-Chair UPW SEMI Standards team, and UP Micro Conference Strategy Team. In addition to many industry publications, Dan also holds a patent for Reduction of Charging Induced Damage in Photolithography Wet Process.

Samsung Austin Semiconductor

Kevin Wolfe is an environmental engineer working within the Global Environmental department at Intel Corporation. He has been working at Intel for 21 years in many environmental health and safety capacities, and currently leads the PFAS working group internal to Intel, and helps to project manage the SIA Semiconductor PFAS Consortium that intends to work towards developing the technical information that will be required to effectively engage with PFAS regulatory restriction efforts.

Please see my LinkedIn profile: https://www.linkedin.com/in/sergei-shatsman/

Kamyar Mehrabi

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